1. Field of the Invention
The present invention relates to a radio-frequency integrated circuit for processing radio-frequency signals, and in particular to a radio-frequency integrated circuit used in a radio-frequency transmitter-receiver such as a portable telephone. More particularly, the invention relates to a radio-frequency integrated circuit having a transmission/reception multiplexing switch and a control circuit for controlling transmission/reception modes of the multiplexing switch, which are arranged in an RF front end portion for transmitting and receiving radio-frequency signals in a portable telephone, or a radio-frequency integrated circuit including a power amplifier amplifying a radio-frequency signal and a circuit producing a bias voltage for controlling a gain of the power amplifier.
2. Description of the Background Art
Recently, the market for mobile communications has been growing owing to the widespread use of extremely compact portable telephones. The mobile communications system may use an analog modulation system in which carrier waves are analog-modulated with audio signals for transmission and reception, or may use a system in which audio signals are converted into digital data, and then digital modulation of carrier waves is performed for transmission. For improving portability of such compact portable telephones, efforts have been made to reduce the size, weight and thickness thereof. For implementation of these factors, it is extremely important to reduce chip sizes of components and to enhance a functional integration.
The compact portable telephone system uses carrier waves in a frequency band of the order of gigahertz (GHz), and in the RF front end portion for transmitting and receiving such radio-frequency signals, a GaAs IC chip including MESEFTs (Metal Semiconductor Field effect Transistors) formed of GaAs (gallium arsenide). Miniaturizing technology for GaAs has been less developed compared with silicon technology for forming MOS transistors. Therefore, integration of the GaAs IC chips have not been developed sufficiently, and of reduction in size through high integration of the components thereof have been strongly desired.
FIG. 1 schematically shows a whole structure of a portable telephone in the prior art. In FIG. 1, the portable telephone includes an RF front end portion which transmits and receives radio-frequency signals via an antenna ANT, and an audio processing circuit APC which receives a reception signal RX-OUT from the RF front end portion in a receiving operation, and performs predetermined processing on the reception signal to reproduce and apply audio signals to a speaker SPK. Audio processing circuit APC also operates, in a transmitting operation, to receive audio signals from a microphone MIC, and send the received audio signals to the RF front end portion after effecting processing, which is reverse to the processing in the receiving operation, on the audio signals. The portable telephone further includes a controller CTRL which controls operations of audio processing circuit APC and the RF front end portion.
Audio processing circuit APC includes an ADPCM codec which performs coding and decoding in accordance with, e.g., ADPCM (adaptive differential pulse code modulation) as well as circuitry for time-division multiplexing of transmission signals and reception signals. Controller CTRL controls the switching between the transmission mode and the reception mode in audio processing circuit APC, and also controls the time-division multiplexing of the transmission and reception signals and other processing. Controller CTRL produces control signal CONT, which in turn includes several kinds of signals and performs instruction of the transmission/reception modes as well as control of the levels of the transmission and reception signals and other processing in the RF front end portion.
The RF front end portion further includes an oscillator circuit OSC generating a signal of a constant frequency, e.g., of 1.66 GHz, a control logic CTL which generates a signal controlling the operation of the RF front end portion in accordance with control signal CONT transferred from controller CTRL, a mixer MIXt which mixes a coded audio signal transferred from audio processing circuit APC with an oscillating signal transferred from oscillator circuit OSC, a transmission attenuator TXATT which attenuates the signal transferred from transmission mixer MIXt in accordance with the control signal transferred from control logic CTL, a negative voltage generating circuit NVG which generates a negative voltage VG in accordance with a control voltage VNVG transferred from controller CTRL, a power amplifier PA which has a gain controlled by the negative voltage VG transferred from negative voltage generating circuit NVG used as a bias voltage, and performs power amplification of the signal transferred from transmission attenuator TXATT, and a bandpass filter (BPF) BFt allowing passage of signals in a predetermined band of the output signals of power amplifier PA.
Transmission mixer MIXt adds coded audio signal TX-IN transferred from audio processing circuit APC with the oscillating signal transferred from oscillator circuit OSC, to produce a radio-frequency signal suitable for transmission. Transmission attenuator TXATT reduces an amplitude of the signal transferred from mixer MIXt in accordance with a signal transferred from a radio-frequency signal intensity indicator (not shown) included in controller CTRL, and controls the level of the transmission signal.
Power amplifier PA, which will be described later in more detail, includes MESFETs as its components, and receives negative voltage VG as a bias voltage for controlling the gain for operating MESFETs in a reverse bias state with the gate to source. Owing to power amplifier PA, the transmission signal is transferred via antenna ANT with a large power. The carrier wave of the transmission signal transferred from power amplifier
is in a frequency band of about 1.9 GHz, and the transmission bandpass filter BFt allows passage of the signal in this band.
The RF front end portion further includes a transmission/reception multiplexing switch SW which multiplexes the transmission mode and the reception mode under the control of control logic CTL. Transmission/reception multiplexing switch SW includes a transmission signal input node Wt receiving the transmission signal from the transmission bandpass filter BFt, a transmission/reception node Wa coupled to antenna ANT, and a reception signal output node Wr. Transmission/reception node Wa is coupled electrically and selectively to one of transmission signal input node Wt and reception signal output node Wr under the control of control logic CTL.
In the portable telephone shown in FIG. 1, the transmission signal and the reception signal are in the same frequency band of approximately 1.9 GHz, and transmission and reception are switched with this transmission/reception multiplexing switch SW. As already described, audio processing circuit APC transmits and receives the transmission signal and reception signal in a time division manner and, in accordance with this time division operation, control logic CTL sets transmission/reception multiplexing switch SW to one of the transmission mode, reception mode and standby mode.
The RF front end portion further includes a reception attenuator RXATT which attenuates the reception signal transferred from reception signal output node Wr of transmission/reception multiplexing switch SW under the control of control logic CTL, a reception bandpass filter (BPF) BFr which allows passage of signals in a predetermined frequency band of the output signals of reception attenuator RXATT, a low noise amplifier LNA which amplifies the output signal of reception bandpass filter BFr, and a reception mixer MIXr which mixes the output signal of low noise amplifier LNA with the oscillating signal from oscillator circuit OSC, and converts the radio-frequency signal into a signal in a frequency band suitable to processing of audio processing circuit APC.
Similarly to transmission attenuator TXATT, the degree of attenuation of reception attenuator RXATT is controlled by control logic CTL based on the reception signal level monitored by a personal user or control logic CTL. Reception bandpass filter BFr allows passage of signals in the frequency band of the carrier wave. Low noise amplifier LNA includes MESFETs as its components, and amplifies weak reception signals. Reception mixer MIXr subtracts the oscillating signal of oscillator circuit OSC from the output signal of low noise amplifier LNA, and produces a reception signal (received coded audio signal) RX-OUT in the frequency band suitable to processing in audio processing circuit APC.
FIG. 2 shows a structure of the integrated circuit of the RF front end portion shown in FIG. 1. The structure of the RF front end IC shown in FIG. 2 is disclosed in "GaAs RF transceiver IC for 1.9 GHz Digital Mobile Communication Systems", Digest of Technical Papers, 1996 ISSCC, Yamamoto et al, Feb. 10, 1996, pp. 340-341.
In FIG. 2, the RF front end IC includes all the components included in the RF front end portion shown in FIG. 1 except for bandpass filters BFt and BFr as well as antenna ANT. Mixers MIXt and MIXr as well as oscillating circuit OSC, which are not shown in FIG. 2, are formed in a GaAs chip or Si chip, and the chip used for them can now be selected differently. Bandpass filters BFt and BFr are arranged outside IC (chip) RFFP for accurately passing the signals in a required band, and are formed of discrete parts, and are connected to chip RFFP via terminals TX-OUT and SW-TX and terminals SW-RX and RX-TV, respectively. Thereby, the chip size of RF front end IC RFFP, and therefore the cost thereof are intended to be reduced.
Power amplifier PA includes power amplifier circuits PAa-PAc in three stages. Gains of power amplifier circuits PAa-PAc are controlled in accordance with bias voltage VG generated by negative voltage generating circuit NVG.
A negative voltage VSS applied from negative voltage generating circuit NVG to control logic CTL is used for controlling on/off switching of transistors included in transmission/receipt multiplexing switch SW. The structure for this control will be described later.
This RF front end IC is formed of a single GaAs chip. Transmission bandpass filter BFt is connected between transmission signal ports SW-TX and TX-OUT, and reception bandpass filter BFr is connected between reception ports SW-RX and RX-IN. Transmission/reception multiplexing switch SW is coupled to antenna ANT via a transmission/reception port WAP coupled to antenna ANT. Further, ports TX-IN and RX-OUT for signal reception and transmission from and to audio processing circuit APC (see FIG. 1) as well as signal input terminals VNVG and CONT for receiving control signals are arranged.
The circuit elements included in RF front end IC RFFP shown in FIG. 2 include, as components, MESFETs formed on a GaAs substrate.
FIG. 3 shows by way of example structures of transmission/reception multiplexing switch SW and control logic CTL shown in FIG. 2. More specifically, FIG. 3 shows structures of a transmission switch SWa of transmission/reception multiplexing switch SW and an output stage CTLa controlling transmission switch SWa in control logic CTL. In the reference described previously, transmission switch SWa includes two switching transistors connected in series, but FIG. 3 shows only one of the switching transistors for simplicity.
In FIG. 3, transmission switch SWa includes a depletion type MESFET (Metal-Semiconductor Field effect Transistor) J10, which in turn will be referred to as a "D-MES transistor" hereinafter. D-MES transistor J10 is connected between transmission signal input node Wt and transmission/reception node Wa, and receives on its control electrode (gate) a control voltage Vc through a resistance element R10. Transmission switch SWa further includes a resistance element r10, which in turn is connected between the source and drain of D-MES transistor J10 and exhibits a high impedance in an AC (alternating current) manner. Resistance element R10 makes a connection between the source and drain of D-MES transistor J10 in a DC (direct current) manner, and holds the source and drain thereof at the same potential in the DC manner. Resistance element R10 functions as a load resistance which suppresses a current flowing through the gate of D-MES transistor J10, and also has a function of reducing an AC component.
Transmission/reception multiplexing switch SW includes a reception switch SWb arranged between transmission/reception node Wa and reception signal output node Wr. Reception switch SWb likewise includes MESFETs as its components. In the foregoing prior art reference, the MESFET included in reception switch SWb receives a control voltage changing between a positive power supply voltage Vdd and a negative voltage Vss applied from negative voltage generating circuit NVG on its gate as a control signal, but a path for this control signal is not shown in detail (only a path SL2 is shown).
Control voltage output stage CTLa of control logic CTL includes an enhancement-type MESFET EI, which will be referred to as an "E-MES transistor" hereinafter. Enhancement-type MESFET EI is connected between a power supply node Vdd (the node and the voltage applied thereto are indicated by the same characters) and output node Vo, and receives on its gate a control signal .phi.. The control voltage output stage also includes an E-MES transistor E2 which is connected between output node Vo and a ground node gnd, and receives on its gate a control signal /.phi.. Control signals .phi. and /.phi. are signals complementary with each other.
In the transmission mode, control signal .phi. is at H-level, and control signal /.phi. is at L-level. E-MES transistor E1 is on, and E-MES transistor E2 is off so that control voltage Vc at the level of power supply voltage Vdd is applied to the gate of D-MES transistor J10 via signal line SL1 and resistance element R10. Thereby, D-MES transistor J10 is turned on so that transmission signal TX applied to transmission signal input node Wt is transferred to transmission/reception node Wa, and then is transferred to antenna ANT for transmission therefrom.
During standby or reception mode, control signal .phi. is at L-level, and control signal /.phi. is at H-level. Control voltage Vc is at the level of ground voltage gnd so that D-MES transistor J10 is turned off, and transmission signal input node Wt is isolated from transmission/reception node Wa in AC manner.
In the MESFET, the gate and the substrate region (channel region) are isolated from each other by a Schottky junction. In this structure, the source/drain is coupled to the gate in the AC manner through the junction capacitance, and a radio-frequency component leaks (i.e., a radio-frequency current flows) to the gate region of the E-MES transistor. Resistance element R10 restrains this radio-frequency component. In the portable telephones, however, signals of large powers flow between ports Wt and Wa. For example, a signal of about 22 dBm flows in a PHS (personal handyphone system), and signal of about 30 dBm flows in a PDC (personal digital cellular) system. Due to such large powers, a radio-frequency component S1 leaks through the gate of D-MES transistor J10 and resistance element R10.
If the output impedance provided by E-MES transistors E1 and E2 of control voltage output stage is not sufficiently small, reflection of the radio-frequency component occurs, and control voltage Vc varies in accordance with the radio-frequency leakage component S1 so that the gate potential of D-MES transistor J10 of transmission switch SWa oscillates, and on/off switching thereof cannot be accurately controlled. Accordingly, the withstand power characteristics (handling power) of transmission/reception multiplexing switch SW is lowered, and large power signals cannot be transmitted accurately.
The radio-frequency component also leaks through the MESFET included in reception switch SWb connected to port Wa. A radio-frequency component S2 flows through signal line SL2 to the control voltage generating portion of reception switch SWb, and on/off of reception switch SWb cannot be controlled accurately.
For sufficiently reducing the output impedance of output stage CTLa, MESFETs having a large gate width of 50-100 .mu.m or greater must be used as E-MES transistors E1 and E2. In this case, an area occupied by output stage CTLa increases, which impedes high-density integration. If E-MES transistors E1 and E2 have a large gate width, current driving capabilities thereof must be increased for fast driving of gate capacitances thereof. For increasing such driving capabilities, it is necessary to increase the gate width of other MESFETs producing control signals .phi. and /.phi., which results in an increase in area occupied by control logic CTL as well as increase in current consumption.
Usually, for the portable telephone including transmission/reception multiplexing switch SW, a TDMA (time-division multiple access) technology is used. Since multiple channels are allocated to the same carrier wave frequency, audio data is divided into slots, which are successively transferred or received with times shifted from each other so that conflict with another channel may be prevented. In PHS system, carrier waves in the same frequency band (1.9 GHz) are used for transmission and reception. For this transmission and reception, a TDD (time-division duplex) system is employed for switching in a time-division manner. In this case, however, transmission/reception multiplexing switch SW must be switched between the transmission and reception at a high speed such as several nanoseconds to hundreds of nanoseconds, and therefore E-MES transistors E1 and E2 rapidly perform the switching operation. For the fast switching operation of E-MES transistors E1 and E2 having large gate widths, the circuit generating control signals .phi. and /.phi. must rapidly change control signals .phi. and /.phi. with a large current driving capability. Accordingly, current consumption increases in the circuit portion for generating control signals .phi. and /.phi..
Such increase in current consumption is not preferable in portable telephones and other apparatus which operate with batteries used as an operational power supply.
FIG. 4 shows an appearance of an assembly of the RF front end portion of the portable telephone shown in FIG. 1. In FIG. 4, control logic CTL and transmission/reception multiplexing switch SW are formed on different GaAs chips, respectively. Control logic CTL and transmission/reception multiplexing switch SW which are formed on the different chips, respectively, are mounted on a board and are mutually connected. In FIG. 4, transmission/reception multiplexing switch SW is arranged on a die pad DP. Around transmission/reception multiplexing switch SW, there are arranged a pad Wtp forming transmission signal input node Wt, a pad Wap forming transmission/reception node Wa, a pad Wrp forming a reception signal output node, and pads Vct and Vcr forming control voltage input nodes. These pads Wtp, Wap, Wrp, Vct and Vcr are connected to leads Le1-Le5 through bonding wires b1-b5, respectively. Transmission/reception multiplexing switch SW and die pad DP as well as portions of leads Le1-Le5 are sealed in a package SWP. Leads Le1-Le5 form external terminals for transmitting or receiving signals to or from other chips.
Bonding wires b1-b5 have widths much larger than those of signal transmission lines included in transmission/reception multiplexing switch SW. Pads Wtp, Wap, Wrp, Vct and Vcr have sufficiently large widths. Leads Le1-Le5 have sufficiently large widths for forming the external terminals. Therefore, these pads, bonding wires and leads provide a large parasitic inductance L as represented by broken line in FIG. 4. In a radio-frequency band of, e.g., 1 GHz, inductance component L prevents external leakage of the radio-frequency signals (Z=2.multidot..pi..multidot.f.multidot.L, where f is a frequency).
Accordingly, in the structure including transmission/reception multiplexing switch SW and control logic CTL formed in the different chips, respectively, as shown in FIG. 4, no problem substantially occurs even if the radio-frequency component leaks. However, in the structure including the RF front end portion integrated in the single GaAs chip as shown in FIG. 2, the pads, bonding wires and leads shown in FIG. 4 are not present so that the radio-frequency component is not restrained, resulting in a problem that the control voltage becomes instable.
In the structure shown in FIG. 3, high inductance elements can be arranged at control signal (voltage) transmission lines SL1 and SL2. In this case, however, the chip area increases because the inductance elements including coils occupy a large area.
FIG. 5 schematically shows a connection between power amplifier PA and negative voltage generating circuit NVG shown in FIGS. 1 and 2. More specifically, FIG. 5 shows structures of a power amplifier circuit PAi in one stage and a gate voltage control circuit GVC which generates a gate voltage Vg controlling a gain of power amplifier circuit PAi.
In FIG. 5, power amplifier circuit PAi includes a D-MES transistor J11 which receives on its gate a radio-frequency signal (transmission signal) TXi through a capacitance element Cc, and amplifies the same for applying the amplified signal to a power amplifier circuit in the next stage or an output stage, and a resistance element R11 and a capacitance element C11 which are connected in series between the gate of D-MES transistor J11 and ground node gnd. Capacitance element Cc has a function of cutting off a DC component. Capacitance element C11 is turned on in the operation frequency band of input signal TXi, to electrically connect an end of resistance element R11 to ground node gnd. Control voltage Vg is applied to a connection between resistance element R11 and capacitance element C11. Resistance element R11 biases the gate potential of E-MES transistor J11 in accordance with control voltage Vg, and determines the operation point of D-MES transistor J11 for controlling the gain of power amplifier circuit PAi.
Gate voltage control circuit GVC of negative voltage generating circuit NVG includes an E-MES transistor E3 which receives on its gate a constant negative voltage V1, and produces control voltage Vg on an output node OUT, and a load resistance RL which is connected between output node OUT and negative voltage node VSS. E-MES transistor E3 operates in a source follower mode, and holds output node OUT at a constant potential level of (V1-Vth), where Vth represents a threshold voltage of E-MES transistor E3. Load resistance RL has a function of pulling down the potential on output node OUT.
In power amplifier circuit PAi, capacitance element C11 is in a short-circuited state in the AC manner, and electrically couples resistance element R11 to ground node gnd in the frequency band of input signal TXi. Capacitance element C11 isolates resistance element R11 from ground node gnd in the DC manner, and resistance element R11 is supplied with control voltage Vg on its one end. Gate control voltage Vg lowers the gate voltage of D-MES transistor J11, and lowers the gain. Thereby, oscillation of the three cascaded stages of power amplifier circuits is prevented.
However, if capacitance element C11 does not short-circuit all the signals to ground node gnd in the frequency band of input radio-frequency signal TXi, a radio-frequency component S3 of radio-frequency signal TXi supplied during operation of power amplifier circuit PAi or the signal amplified by transistor J11 is transmitted to gate voltage control circuit GVC via a signal line G1. Radio-frequency leakage component S3 is an AC signal. In gate voltage control circuit GVC, circuit impedance accompanying gate voltage control circuit GVC differs for positive and negative components of radio-frequency leakage component S3 (see the foregoing reference by Yamamoto et al.). Therefore, the voltage level of control voltage Vg may vary from the desired value. This is because the radio-frequency leakage component S3 is rectified so that performance of gate voltage control circuit GVC for holding a stable voltage in the DC manner is lowered.
The radio-frequency leakage component is restrained by the parasitic inductance component of the bonding wires, pads and leads, if power amplifier circuit PAi and negative voltage generating circuit NVG are formed in the different chips, respectively, as shown in FIG. 4. However, the structure wherein the RF front end portion is integrated in the single chip as shown in FIG. 2 suffers from a problem similar to the foregoing problem caused by the transmission/reception multiplexing switch and the control logic.